Radiation Tolerant Memory IP

Radiation Tolerant Memory IP

APC Technology Group plc

Radiation Tolerant Memory IP

Controller IP Core

The 3D PLUS 3DIPMC700-1, available from APC Hi-Rel, is a fully configurable DDR2 SDRAM radiation intelligent memory controller IP core designed to work with 3D PLUS DDR2 memory modules to achieve a radiation hardened DDR2 solution. The 3DIPMC700-1 can be configured to support different types of ECC for data width applications from 8b up to 64b; providing SEU mitigation and SEFI protection.

The RIMC IP Core is defined by two interfaces: the user interface, which is AMBA compliant, and the DDR PHY interface, compliant to DFI 2.1, to send commands and data to the DDR memory components through the DDR PHY (depends on different FPGAs). The user interface contains at least one AHB bus, and may contain an optional APB bus for user dynamic configuration. The RIMC controller can be configured by the core logic using 2 different AMBA interfaces: -Slave AHB/AXI interface with specific address mapping -Slave APB interface dedicated to internal registers.

Controller IP Core key features:

  • Variable user data width: from x8 to x64b
  • Selectable Hamming or Reed Solomon coding schemes
  • Configurable number of DDR2 ranks to increase memory capacity
  • Clock and ODT settings compatible with 3D PLUS modules
  • Capability to manage redundant memory designs
  • Supports burst of 4 and burst of 8
  • DDR2 interfaces DDR memory scrubbing can be enabled or disabled
  • Scrubbing can be performed at a user-defined frequency
  • Selectable DRAM refresh time
  • Bank management algorithm is instantiated inside the RIMC
  • User interface AMBA compliant (AXI/AHB/APB)
  • Configurable through AMBA interfaces
  • Configurable number of AHB slave interfaces
  • DDR PHY interface DFI 2.1 compliant
  • Dynamically configurable via the APB slave interface
  • User can implement an AHB and/or AXI slave interface, 1 to 8 ports can be instantiated
  • Provides a direct access to DDR memory array with a controller bypass mode
DescriptionPackageTemp*SCD#
Description:DDR2 ControllerPackage:IP CoreTemp*:N/ASCD#:3DFP-0700:Request datasheet
APC Technology Group plc

Reed Solomon IP Core

3D PLUS’s Reed Solomon encoding and decoding IP cores, from APC Hi-Rel, are designed to provide protection for data storage in space applications.
Reed Solomon is a block code, the transmitted codeword is divided in blocks of data called symbols. Symbols are coded on several bits as elements of a Galois field. The Reed Solomon IP is based on the Galois field GL(2^4), where symbols are coded on 4 bits and the maximum size of a message after encoding is 15 symbols (60 bits). The Reed Solomon IP core offers the possibility to address data bus with more than 60 bits by implementing several encoders or decoders inside the same IP.

Reed Solomon IP Core key features:

  • Configurable input data size
  • Configurable ECC size
  • 1 or 2 symbol correction capacity, symbol size is half the size of ECC
  • Decoder indicates when a symbol is corrected
  • Decoder indicates when an incorrigible error is detected
DescriptionPackageTemp*SCD#
Description:Reed Solomon 2 symbolsPackage:IP CoreTemp*:N/ASCD#:3DFP-0725:Request datasheet
Description:Reed Solomon 4 symbolsPackage:IP CoreTemp*:N/ASCD#:3DFP-0726:Request datasheet

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