Correct handling of ceramic capacitors
by CalRamic Technologies LLC
Available from APC Hi-Rel, CalRamic manufactures high voltage ceramic capacitors for a variety of industries from geophysical to space.
Ceramic capacitors are complex mechanical structures requiring careful handling due to their sensitivity and brittle nature, even though most components are generally coated.
CalRamic has produced a helpful guide (below) on how to minimise the risk of mechanical and thermal shock and other damage that can occur if the operator does not pay attention to how they handle the device. In addition, care should be taken to ensure that the surface of a capacitor is not contaminated or compromised. Failure to observe basic handling practices may result in the formation of internal microfractures, surface chip outs and/or other adverse conditions, which may affect the performance and reliability of the component.
How to handle ceramic capacitors
Ceramic capacitors are complex mechanical structures that can be easily damaged or contaminated if they are not handled with care. Undesirable results can occur through a multitude of circumstances and although the majority of issues may be obvious and addressed through intended inspection protocols and cleaning techniques, a small percentage may escape detection and may represent a latent failure condition that may not be evident until sometime after the part/system is out in the field. Recommendations offered in this Application Note are intended to provide general guidelines for handling of ceramic capacitors. It reviews the importance of basic handling techniques and provides recommendations that when followed, will help to prevent associated problems from occurring.
Ceramic capacitors are susceptible to mechanical and thermal shock and larger capacitors, in particular, can be easily damaged if the operator does not pay particular attention to how they handle the device. In addition, care should be taken to ensure that the surface of a capacitor is not contaminated or compromised. Failure to observe basic handling practices may result in the formation of internal microfractures, surface chip outs and/or other adverse conditions, which may affect the performance and reliability of the component.
CalRamic Technologies has adopted necessary controls and handling procedures to ensure that these capacitors are undamaged and not contaminated throughout processing and delivery and the customer, in turn, needs to assure that same level of care is taken from the point of receipt, thru assembly and final test.
A lot of issues related to the proper functioning of a capacitor and/or performance of the end system, can be attributed to the subject of surface contamination. The push for smaller sizes and higher operating voltages require that capacitors be precisely designed to meet adequate creepage and clearance dimensions and any change to those criteria, even minor, can have a significant impact.
Surface resistivity of ceramic, although somewhat dependent on the ceramic body itself, is extremely high in comparison to other materials and contaminants that the finished unit is often be exposed to. Salts and oils found on an operators fingers, for example, can introduce ionic contamination to the surface of a capacitor reducing the insulative properties of the device. Metal markings or smears imparted to the surface through the use of metal tweezers or through contact of terminations from one capacitor to another can also reduce the clearance and affect the breakdown characteristics of the capacitor.
Proper handling of capacitors, especially bare ceramic, is critical to ensure contamination and a subsequent reduction in the physical/electrical performance characteristics of the device does not occur. That said, direct contact of the capacitor by an operator should be limited to the use of non-metal tweezers, plastic finger cots or gloves and non-contaminating cloth gloves and special care should be taken to ensure that loose capacitors, especially larger ones, are prevented from making direct contact with each other.
Another possibility for contamination can occur in the area of packaging and storage. As with direct contact, a lack of attention to the type of packaging and the means in which the capacitors are stored can result in surface contamination that might likewise result in reduced electrical performance. In addition, the choice of certain packaging types can result in contamination through outgassing, resulting in terminations that are unsolderable. It is recommended therefore that all capacitors be packaged in non-contaminating containers and plastic bags, that for capacitors manufactured with pure silver termination, that they are stored with silver saver paper and that if possible, the bags or containers be vacuum sealed and backfilled with nitrogen. All capacitor products should also be housed in a room temperature/moisture controlled environment.
For certain high voltage applications where component density has been maximized and proper electrical isolation is essential to system performance, customers are likely to incorporate additional encapsulation materials in their design. The effectiveness of these practices can be affected by the type of finish on these components, whereby proper adhesion to a smooth surface may be much more difficult to achieve than that of a rough surface. Where this may be a concern, CalRamic Technologies has the ability to provide a capacitor where the parts normally smooth insulative epoxy coating has been abraded. The most common method of achieving this condition is through abrasive blasting, where the equipment used is similar to that used for sandblasting, but on a much smaller scale, hence the term “micro” blasting.
The resulting surface, while providing excellent adhesion to potting compounds, is also much more susceptible to contamination. Any contact with metallic objects such as the leads of other capacitors, metal tweezers, or soldering equipment, for example, will result in a metal streak, which can create a low resistance path for arcing or current leakage. With that in mind, extreme care should be taken when storing and handling micro-blasted capacitors. As much as possible, capacitors should be maintained in their original packaging until needed and once removed, parts should always be kept isolated from each other. Parts should never be bulk or bin packaged and operators should always use plastic gloves, finger cots or non-marking, plastic tipped tweezers when removing from original packaging and handling during installation.
Please note: Micro-abrasion or micro-blasting is a very sensitive process that requires experienced operators and the use of proper equipment to ensure that the reliability of the capacitor has been maintained. That said, CalRamic Technologies strongly advises against any customer micro-blasting capacitors due to the possibility of removing too much coating or damaging the lead finish. Please contact CalRamic Technologies for more information.
CalRamic Technologies takes special care to ensure that capacitors delivered to our customers are free from any sort of mechanical damage. The processes that we utilize, the environments in which the components are maintained, the way in which we handle the capacitors and the means in which they are packaged, have all been developed with intention of ensuring the integrity of these components. With that in mind, it becomes incumbent on the customer to ensure that this theme carries over through their manufacturing processes and handling practices.
As much as possible, it is highly recommended that the capacitors remain in their original packaging containers until they are actually needed for assembly. Larger surface mount chip capacitors, for example, are often placed in waffle packaging that keeps the individual units separate from each other. If the components were removed from this packaging and allowed to come into contact with each other, there is a high likelihood that through the processing sequence that some of the parts could impact others, resulting in chipouts or cracks. Although radial leaded parts are typically provided with a protective conformal coating, removal from the packaging and storage in a bulk container is also not advised, as this may cause the leads to become nested. Detangling the leads will likely cause a portion to become misaligned making assembly difficult, but of more concern would be the mechanical stress that this would place on the lead to epoxy, or lead to solder joint interface.
When capacitors are finally removed from their packaging they need to be handled with a high level of care. Bare capacitors, especially those with larger form factors, should never be dumped into a common basket or container. Impacting a hard surface, even from a relatively small distance can damage the device.
In addition, if through the course of assembly, a capacitor is inadvertently dropped onto a hard surface like a table or the floor, the operator should always err on the side of caution by scrapping the device. As mentioned in other application notes, detection of tiny microfractures is not a simple task and their presence may not affect performance until the part is out in the field.
Another aspect of this topic that has gained a lot of attention over the past few years is the issue of stress fractures that may be introduced to MLCC’s through improper handling of printed circuit boards. Ceramic capacitors are highly susceptible to fracturing when placed under tension and if a PCB is allowed to flex, a high level of stress may be imparted directly to the solder/capacitor interface. Whereas most solders exhibit some level of ductility which allows it to absorb a level of tensile stress, ceramic has essentially no flexibility thereby becoming the weak link in the equation. Where board flexure is a concern, preference should always be given to the use of leaded alternatives. If the use of a leaded capacitor is not possible, operators should always take care during handling to ensure that the PCB remains as rigid as possible. In addition, capacitors that are soldered directly to the board should if at all possible, be mounted in an area of the board where the assembly is less prone to board flexure.
As outlined in Application Notes AN101, AN102 and AN103 that cover soldering process recommendations for ceramic capacitors, larger form factor capacitors, especially those 2520 and up, are particularly susceptible to thermal shock damage. There are certain tests like Resistance to Solder Heat, Thermal Shock and Low Temp Storage, that are utilized to gauge the ability of a capacitor to withstand anticipated thermal conditions, but those tests are performed in a controlled environment and not necessarily representative of the type of extremes that a component could potentially be exposed to throughout the processing cycle.
From a manufacturing perspective, engineers have generally developed highly reliable soldering and encapsulation processes, complete with integrated preheat and cooldown cycles that minimize the risk of thermal shock. For those less sophisticated operations, it is important to re-emphasize that soldering instruments should never be allowed to come into direct contact with the capacitor, and that components and assemblies should be allowed to first cool to room temperature before exposure to cleaning solutions. In addition, it is essential to ensure that the cooling process is completed through natural means and that proper handling should preclude the use of cooling fans and large heat sinks.
In general terms the use of leaded capacitors should always be given strong consideration, especially for those capacitors that are 2520 and larger. These leads are specially designed to provide for a higher level of mechanical and thermal stress protection against those adverse conditions often encountered during handling, installation, or when exposed to high vibration and/or high shock environments.
This application note has been published by CalRamic and is available to view on their website > Note 112